Electronic devices with high performance and low power consumption are gradually becoming a market trend for recent years. A dynamic random access memory (DRAM) consumes most of the power in an electronic device. Currently, for the development of the DRAM, in addition to increasing the storage capacity of the DRAM, speeding up the operation of the DRAM and achieving broad band for data transmission, and decreasing the power consumption of the DRAM are major research directions in the industry. In general, the DRAM with low power consumption could be realized by the methods such as adopting advanced process to achieve a low voltage operation, lowering the value of the input/output capacitance of the DRAM, providing deep power down mode and altering the data update frequency of the storage units of the cell array in the DRAM. However, these methods may increase the manufacturing cost and may not substantially decrease the power consumption of the chip.